Tridora-CPU/doc/spisd.md

SPI SD-Card Controller

The SPI-SD-Card controller uses a single register at address $880.

Reading the register

bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
Value	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-

bit	15	14	13	12	11	10	09	08	07	06	05	04	03	02	01	00
Value	-	cd	cc	cb	tr	te	ra	ro	d	d	d	d	d	d	d	d

Bitfields	Description
cd	card detect
cc	card changed
cb	card busy
tr	transmitter ready
te	transmitter fifo empty
ra	received byte available
ro	receiver overrun
d	received byte data

Reading the register does not advance to the next byte in the read fifo. This is done by using the DR bit on a register write (see below).

Writing the register

bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
Value	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-

bit	15	14	13	12	11	10	09	08	07	06	05	04	03	02	01	00
Value	-	CW	CF	Cx	Cc	Cd	DR	DW	D	D	D	D	D	D	D	D

Bitfields	Description
CW	control write
CF	enable receive filter
Cx	enable transceiver
Cc	force spi clock on
Cd	write clock divider
DR	read acknowledge
DW	data write
D	byte data

• CF, Cx and Cc flags are used together with CW
• Cd together with d sets the clock divider
• DW together with d writes a data byte
• if the receive filter is set, all received bytes are ignored until a byte is received that is not $FF
• receiving a byte that is not $FF disables the receive filter
• Cc is used to enable the clock without sending/receiving anything - used for card initialization

Example transaction:

1. read register, loop until te is set
2. write command bytes to register (DW | data)
3. write Cx|CF to register
4. read register, loop until ra is set
5. process data byte
6. write DR to register
7. repeat last three steps until complete response has been read
8. wait a bit/send a few more $FF bytes
9. disable transceiver, write CW to register (Cx = 0)