UART
The UART a single register at address $900.
It uses a fixed serial configuration of 115200 bps, 8 data bits, 1 stop bit, no parity.
Reading the UART register
| bit |
31 |
30 |
29 |
28 |
27 |
26 |
25 |
24 |
23 |
22 |
21 |
20 |
19 |
18 |
17 |
16 |
| Value |
u |
u |
u |
u |
u |
u |
u |
u |
u |
u |
u |
u |
u |
u |
u |
u |
| bit |
15 |
14 |
13 |
12 |
11 |
10 |
09 |
08 |
07 |
06 |
05 |
04 |
03 |
02 |
01 |
00 |
| Value |
u |
u |
u |
u |
u |
u |
A |
B |
d |
d |
d |
d |
d |
d |
d |
d |
| Bitfields |
Description |
| A |
data available, at least one byte has been received |
| B |
TX busy, a byte is being transmitted and no data can be written |
| d |
8 data bits |
| u |
unused |
Writing the UART register
| bit |
31 |
30 |
29 |
28 |
27 |
26 |
25 |
24 |
23 |
22 |
21 |
20 |
19 |
18 |
17 |
16 |
| Value |
u |
u |
u |
u |
u |
u |
u |
u |
u |
u |
u |
u |
u |
u |
u |
u |
| bit |
15 |
14 |
13 |
12 |
11 |
10 |
09 |
08 |
07 |
06 |
05 |
04 |
03 |
02 |
01 |
00 |
| Value |
u |
u |
u |
u |
u |
T |
C |
u |
d |
d |
d |
d |
d |
d |
d |
d |
| Bitfields |
Description |
| T |
transmit enable, writes a data byte |
| C |
clear receiver, acknowledges a received byte |
| d |
8 data bits |
| u |
unused |
Notes
A 16 byte FIFO is used when receiving data.
When reading data, each byte needs to be acknowledged by writing the C flag to the UART register.
When the FIFO is empty, the A flag in the UART register will be 0.
