Tridora-CPU/tridoracpu
2025-09-28 02:21:58 +02:00
..
tridoracpu.srcs tdraudio: add noise generator 2025-09-28 02:21:58 +02:00
sdspi_testbench_behav.wcfg import Vivado project, rearrange Verilog sources 2024-09-27 22:14:57 +02:00
testbench_behav.wcfg import Vivado project, rearrange Verilog sources 2024-09-27 22:14:57 +02:00
testbench_behav1.wcfg import Vivado project, rearrange Verilog sources 2024-09-27 22:14:57 +02:00
tridoracpu.xpr tdraudio: add noise generator 2025-09-28 02:21:58 +02:00