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implement data cache (write-back or write-through) #2

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slederer merged 1 commit from dcache into main 2025-09-19 22:12:10 +02:00
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slederer commented 2025-09-19 22:11:52 +02:00
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also:

  • new benchmark results
  • experiment with synthesis settings
also: - new benchmark results - experiment with synthesis settings
slederer added 1 commit 2025-09-19 22:11:53 +02:00 
also:
- new benchmark results
- experiment with synthesis settings
slederer merged commit 02765554fb into main 2025-09-19 22:12:10 +02:00
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Reference: slederer/Tridora-CPU#2
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