lib,examples: changes for new register address mapping

This commit is contained in:
slederer 2026-01-28 01:15:16 +01:00
parent 248c9ae919
commit 937369f60b
6 changed files with 25 additions and 28 deletions

View file

@ -701,11 +701,11 @@ CMPWORDS_XT2:
; --------- Graphics Library ---------------
; vga controller registers
.EQU FB_RA $900
.EQU FB_WA $901
.EQU FB_IO $902
.EQU FB_PS $903
.EQU FB_PD $904
.EQU FB_CTL $905
.EQU FB_WA $904
.EQU FB_IO $908
.EQU FB_PS $90C
.EQU FB_PD $910
.EQU FB_CTL $914
; set a pixel in fb memory
; parameters: x,y - coordinates
PUTPIXEL_1BPP:

View file

@ -11,9 +11,9 @@ START_PCMAUDIO:
LOADCP _DIV
CALL
LOADC AUDIO_BASE + 1
LOADC AUDIO_BASE + 4
SWAP ; put clock divider on ToS
STOREI 1
STOREI 4
LOADCP 32768 ; set amplitude to biased 0
STOREI
DROP
@ -95,7 +95,7 @@ PLAY1_L0:
AND
CBRANCH.NZ PLAY1_L0 ; loop if fifo is full
LOADC AUDIO_BASE+2 ; store amplitude value
LOADC AUDIO_BASE+8 ; store amplitude value
SWAP
STOREI
DROP
@ -207,7 +207,7 @@ SMPLQ_I_B:
LOADCP $FFFF
AND
LOADC AUDIO_BASE+2
LOADC AUDIO_BASE+8
SWAP
STOREI ; write sample, keep addr
@ -281,7 +281,7 @@ SMPLQ_I_END1:
DROP
; set amplitude out to zero (biased)
LOADC AUDIO_BASE+2
LOADC AUDIO_BASE+8
LOADCP 32768
STOREI
DROP