diff --git a/examples/fastfire.s b/examples/fastfire.s
index f0e10e4..63ace51 100644
--- a/examples/fastfire.s
+++ b/examples/fastfire.s
@@ -123,11 +123,11 @@ FF_EXIT:
 
 ; framebuffer controller registers
 	.EQU FB_RA $900
-	.EQU FB_WA $901
-	.EQU FB_IO $902
-	.EQU FB_PS $903
-	.EQU FB_PD $904
-	.EQU FB_CTL $905
+	.EQU FB_WA $904
+	.EQU FB_IO $908
+	.EQU FB_PS $90C
+	.EQU FB_PD $910
+	.EQU FB_CTL $914
 	.EQU WORDS_PER_LINE 80
 
 ; fire width in vmem words (strict left-to-right evaluation)
diff --git a/examples/sprites.s b/examples/sprites.s
index 3391339..6962eda 100644
--- a/examples/sprites.s
+++ b/examples/sprites.s
@@ -3,9 +3,9 @@
 
         .EQU WORDS_PER_LINE 80
         .EQU FB_RA      $900
-        .EQU FB_WA      $901
-        .EQU FB_IO      $902
-        .EQU FB_PS      $903
+        .EQU FB_WA      $904
+        .EQU FB_IO      $908
+        .EQU FB_PS      $90C
 
 ; calculate mask for a word of pixels
 ; args: word of pixels with four bits per pixel
@@ -95,7 +95,7 @@ PS_LOOP1:
 	; in the vga controller
 	LOADC FB_RA ; read address register
 	LOAD PS_VMEM_ADDR
-	STOREI 1 ; use autoincrement to get to the next register
+	STOREI 4 ; use autoincrement to get to the next register
 	LOAD PS_VMEM_ADDR
 	STOREI
 	DROP
@@ -322,7 +322,7 @@ UD_S_L1:
 	; store vmem offset into write addr reg
 	LOADCP FB_WA
 	LOAD UD_S_OFFSET
-	STOREI 1	; ugly but fast: reuse addr
+	STOREI 4	; ugly but fast: reuse addr
 			; with postincrement to
 			; get to FB_IO for STOREI below
 
diff --git a/lib/corelib.s b/lib/corelib.s
index d147934..a21b95c 100644
--- a/lib/corelib.s
+++ b/lib/corelib.s
@@ -701,11 +701,11 @@ CMPWORDS_XT2:
 ; --------- Graphics Library ---------------
 	; vga controller registers
 	.EQU FB_RA	$900
-	.EQU FB_WA	$901
-	.EQU FB_IO	$902
-	.EQU FB_PS	$903
-	.EQU FB_PD	$904
-	.EQU FB_CTL	$905
+	.EQU FB_WA	$904
+	.EQU FB_IO	$908
+	.EQU FB_PS	$90C
+	.EQU FB_PD	$910
+	.EQU FB_CTL	$914
 ; set a pixel in fb memory
 ; parameters: x,y - coordinates
 PUTPIXEL_1BPP:
diff --git a/lib/pcmaudio.s b/lib/pcmaudio.s
index 530f52f..ebe812a 100644
--- a/lib/pcmaudio.s
+++ b/lib/pcmaudio.s
@@ -11,9 +11,9 @@ START_PCMAUDIO:
 	LOADCP _DIV
 	CALL
 
-	LOADC AUDIO_BASE + 1
+	LOADC AUDIO_BASE + 4
 	SWAP		; put clock divider on ToS
-	STOREI 1
+	STOREI 4
 	LOADCP 32768	; set amplitude to biased 0
 	STOREI
 	DROP
@@ -95,7 +95,7 @@ PLAY1_L0:
 	AND
 	CBRANCH.NZ PLAY1_L0 ; loop if fifo is full
 
-	LOADC AUDIO_BASE+2 ; store amplitude value
+	LOADC AUDIO_BASE+8 ; store amplitude value
 	SWAP
 	STOREI
 	DROP
@@ -207,7 +207,7 @@ SMPLQ_I_B:
 	LOADCP $FFFF
 	AND
 
-	LOADC AUDIO_BASE+2
+	LOADC AUDIO_BASE+8
 	SWAP
 	STOREI	; write sample, keep addr
 
@@ -281,7 +281,7 @@ SMPLQ_I_END1:
 	DROP
 
 	; set amplitude out to zero (biased)
-	LOADC AUDIO_BASE+2
+	LOADC AUDIO_BASE+8
 	LOADCP 32768
 	STOREI
 	DROP
diff --git a/tridoracpu/tridoracpu.srcs/vgafb.v b/tridoracpu/tridoracpu.srcs/vgafb.v
index 408079a..2d6bc55 100644
--- a/tridoracpu/tridoracpu.srcs/vgafb.v
+++ b/tridoracpu/tridoracpu.srcs/vgafb.v
@@ -132,9 +132,9 @@ module vgafb #(VMEM_ADDR_WIDTH = 15, VMEM_DATA_WIDTH = 32) (
 `ifdef ENABLE_FB_ACCEL
     localparam REG_SHIFTER = 6;
     localparam REG_SHIFTCOUNT = 7;
-    localparam REG_SHIFTERM = 9;
-    localparam REG_SHIFTERSP = 10;
-    localparam REG_MASKGEN = 11;
+    localparam REG_SHIFTERM = 8;
+    localparam REG_SHIFTERSP = 09;
+    localparam REG_MASKGEN = 10;
 `endif
 
     localparam COLOR_WIDTH = 12;
@@ -325,18 +325,14 @@ module vgafb #(VMEM_ADDR_WIDTH = 15, VMEM_DATA_WIDTH = 32) (
     always @(posedge cpu_clk)
     begin
         if (acc_start_shift)
-        begin
             acc_shifter_out <= {acc_shifter_in, {VMEM_DATA_WIDTH{1'b0}}} >> acc_shift_count;
-        end
     end
 
     // mask register
     always @(posedge cpu_clk)
     begin
         if (wr_en && reg_sel == REG_MASKGEN)
-        begin
             acc_mask_in <= wr_data;
-        end
     end
 
     assign acc_mask_out = {
diff --git a/tridoracpu/tridoracpu.xpr b/tridoracpu/tridoracpu.xpr
index 2926f59..a3dd3f6 100644
--- a/tridoracpu/tridoracpu.xpr
+++ b/tridoracpu/tridoracpu.xpr
@@ -376,7 +376,7 @@
       <Report Name="ROUTE_DESIGN.REPORT_METHODOLOGY" Enabled="1"/>
       <RQSFiles/>
     </Run>
-    <Run Id="impl_1" Type="Ft2:EntireDesign" Part="xc7a35ticsg324-1L" ConstrsSet="constrs_1" Description="Default settings for Implementation." AutoIncrementalCheckpoint="false" WriteIncrSynthDcp="false" State="current" SynthRun="synth_1" IncludeInArchive="true" IsChild="false" GenFullBitstream="true" AutoIncrementalDir="$PSRCDIR/utils_1/imports/impl_1" LaunchOptions="-jobs 6 " AutoRQSDir="$PSRCDIR/utils_1/imports/impl_1" ParallelReportGen="true">
+    <Run Id="impl_1" Type="Ft2:EntireDesign" Part="xc7a35ticsg324-1L" ConstrsSet="constrs_1" Description="Default settings for Implementation." AutoIncrementalCheckpoint="false" WriteIncrSynthDcp="false" State="current" Dir="$PRUNDIR/impl_1" SynthRun="synth_1" IncludeInArchive="true" IsChild="false" GenFullBitstream="true" AutoIncrementalDir="$PSRCDIR/utils_1/imports/impl_1" LaunchOptions="-jobs 6 " AutoRQSDir="$PSRCDIR/utils_1/imports/impl_1" ParallelReportGen="true">
       <Strategy Version="1" Minor="2">
         <StratHandle Name="Vivado Implementation Defaults" Flow="Vivado Implementation 2024"/>
         <Step Id="init_design"/>
@@ -389,6 +389,7 @@
         <Step Id="post_route_phys_opt_design"/>
         <Step Id="write_bitstream"/>
       </Strategy>
+      <GeneratedRun Dir="$PRUNDIR" File="gen_run.xml"/>
       <ReportStrategy Name="Vivado Implementation Default Reports" Flow="Vivado Implementation 2024"/>
       <Report Name="ROUTE_DESIGN.REPORT_METHODOLOGY" Enabled="1"/>
       <RQSFiles/>