dram_bridge: cleanup

- mem_wait must be enabled on each write
- dcache_hit is never true on a write, so the
  ~dcache_hit clause was always true

tridoracpu/tridoracpu.srcs/dram_bridge.v

@@ -165,7 +165,7 @@ module dram_bridge #(ADDR_WIDTH = 32, WIDTH = 32)
     assign app_wdf_data = { {4{mem_write_data}} };
 
     assign mem_wait =   (dram_read_enable & ~read_inprogress) |
-                        (mem_write_enable & ~dcache_hit & (~app_wdf_rdy | ~app_rdy)) |
+                        (mem_write_enable & (~app_wdf_rdy | ~app_rdy)) |
                         (read_inprogress & ~app_rd_data_valid);
 
     assign app_en = (dram_read_enable & ~read_inprogress) |