From 4d4cc0c535e1d06df880ec748a220de0a8b7f6a9 Mon Sep 17 00:00:00 2001 From: slederer Date: Tue, 30 Sep 2025 00:49:17 +0200 Subject: [PATCH] dram_bridge: cleanup - mem_wait must be enabled on each write - dcache_hit is never true on a write, so the ~dcache_hit clause was always true --- tridoracpu/tridoracpu.srcs/dram_bridge.v | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/tridoracpu/tridoracpu.srcs/dram_bridge.v b/tridoracpu/tridoracpu.srcs/dram_bridge.v index d4f798b..9bd2a92 100644 --- a/tridoracpu/tridoracpu.srcs/dram_bridge.v +++ b/tridoracpu/tridoracpu.srcs/dram_bridge.v @@ -165,7 +165,7 @@ module dram_bridge #(ADDR_WIDTH = 32, WIDTH = 32) assign app_wdf_data = { {4{mem_write_data}} }; assign mem_wait = (dram_read_enable & ~read_inprogress) | - (mem_write_enable & ~dcache_hit & (~app_wdf_rdy | ~app_rdy)) | + (mem_write_enable & (~app_wdf_rdy | ~app_rdy)) | (read_inprogress & ~app_rd_data_valid); assign app_en = (dram_read_enable & ~read_inprogress) |