slederer d5888861d3 tdraudio: first step of implementing a sound generator		2025-09-23 23:39:04 +02:00
..
tridoracpu.srcs	tdraudio: first step of implementing a sound generator	2025-09-23 23:39:04 +02:00
sdspi_testbench_behav.wcfg	import Vivado project, rearrange Verilog sources	2024-09-27 22:14:57 +02:00
testbench_behav.wcfg	import Vivado project, rearrange Verilog sources	2024-09-27 22:14:57 +02:00
testbench_behav1.wcfg	import Vivado project, rearrange Verilog sources	2024-09-27 22:14:57 +02:00
tridoracpu.xpr	tdraudio: first step of implementing a sound generator	2025-09-23 23:39:04 +02:00