slederer d2cae9480c mem: make SRAM size configurable		2025-09-09 00:13:56 +02:00
..
tridoracpu.srcs	mem: make SRAM size configurable	2025-09-09 00:13:56 +02:00
sdspi_testbench_behav.wcfg	import Vivado project, rearrange Verilog sources	2024-09-27 22:14:57 +02:00
testbench_behav.wcfg	import Vivado project, rearrange Verilog sources	2024-09-27 22:14:57 +02:00
testbench_behav1.wcfg	import Vivado project, rearrange Verilog sources	2024-09-27 22:14:57 +02:00
tridoracpu.xpr	mem: make SRAM size configurable	2025-09-09 00:13:56 +02:00