slederer 7cc9ee807d tdraudio: remove pulse/noise waves, add sample buffer and irq		2025-10-04 00:09:10 +02:00
..
tridoracpu.srcs	tdraudio: remove pulse/noise waves, add sample buffer and irq	2025-10-04 00:09:10 +02:00
sdspi_testbench_behav.wcfg	import Vivado project, rearrange Verilog sources	2024-09-27 22:14:57 +02:00
testbench_behav.wcfg	import Vivado project, rearrange Verilog sources	2024-09-27 22:14:57 +02:00
testbench_behav1.wcfg	import Vivado project, rearrange Verilog sources	2024-09-27 22:14:57 +02:00
tridoracpu.xpr	tdraudio: remove pulse/noise waves, add sample buffer and irq	2025-10-04 00:09:10 +02:00