slederer 7cbf3afba5 tridoracpu: update MIG configuration for Vivado 2024		2025-05-24 23:25:57 +02:00
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tridoracpu.srcs	tridoracpu: update MIG configuration for Vivado 2024	2025-05-24 23:25:57 +02:00
sdspi_testbench_behav.wcfg	import Vivado project, rearrange Verilog sources	2024-09-27 22:14:57 +02:00
testbench_behav.wcfg	import Vivado project, rearrange Verilog sources	2024-09-27 22:14:57 +02:00
testbench_behav1.wcfg	import Vivado project, rearrange Verilog sources	2024-09-27 22:14:57 +02:00
tridoracpu.xpr	tridoracpu: cache bug fixes	2025-03-29 01:29:16 +01:00