Tridora-CPU/tridoracpu
2026-01-01 02:09:02 +01:00
..
tridoracpu.srcs minor comment/documentation cleanups 2026-01-01 02:09:02 +01:00
sdspi_testbench_behav.wcfg import Vivado project, rearrange Verilog sources 2024-09-27 22:14:57 +02:00
testbench_behav.wcfg import Vivado project, rearrange Verilog sources 2024-09-27 22:14:57 +02:00
testbench_behav1.wcfg import Vivado project, rearrange Verilog sources 2024-09-27 22:14:57 +02:00
tridoracpu.xpr minor comment/documentation cleanups 2026-01-01 02:09:02 +01:00