slederer 12033bb6d2 tdraudio: add direct amplitude control		2025-09-29 19:10:48 +02:00
..
tridoracpu.srcs	tdraudio: add direct amplitude control	2025-09-29 19:10:48 +02:00
sdspi_testbench_behav.wcfg	import Vivado project, rearrange Verilog sources	2024-09-27 22:14:57 +02:00
testbench_behav.wcfg	import Vivado project, rearrange Verilog sources	2024-09-27 22:14:57 +02:00
testbench_behav1.wcfg	import Vivado project, rearrange Verilog sources	2024-09-27 22:14:57 +02:00
tridoracpu.xpr	tdraudio: add direct amplitude control	2025-09-29 19:10:48 +02:00