Commit graph

2 commits

Author SHA1 Message Date
slederer
ac42eec912 tridoracpu: add missing xci file for the DRAM controller 2025-03-09 23:51:22 +01:00
slederer
a441e7e042 import Vivado project, rearrange Verilog sources 2024-09-27 22:14:57 +02:00