docs: Add information about interrupt handling
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@ -109,12 +109,16 @@ Note:
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|LOADREG|register spec|load from special register|
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|STOREREG|register spec|store X to special register|
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|FPADJ|10-bit signed constant|adjust FP register|
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### Register Specification
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|Spec|Description|
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|----|-----------|
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|FP | Frame Pointer Register|
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|BP | Base Pointer Register |
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|RP | Return Stack Pointer |
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|IV | Interrupt Vector Register |
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|IR | Interrupt Return Register (readonly) |
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|ESP | Eval Stack Pointer (readonly) |
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### Comparison Selectors
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|Sel|Description | Function |
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@ -126,6 +130,31 @@ Note:
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|GE | greater or equal| Y >= X |
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|GT | greater than | Y > X |
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## Interrupt Handling
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The CPU has a single interrupt line _irq_. Multiple interrupt sources are handled by the interrupt controller. Interrupts need to be enabled in the interrupt controller before any interrupt is signaled to the CPU. See the [Interrupt Controller Documentation](irqctrl.md) for details.
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If an interrupt occurs (i.e. the _irq_ line is high), the address of the next instruction is copied into _IR_ (the interrupt return register).
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Then the program counter is set to the value of _IV_ (the interrupt vector register).
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So the _IV_ register should contain the address of the interrupt handler routine, and the address to return to
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from the interrupt is written to the _IR_ register.
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If the interrupt occurs during the last cycle of an instruction, the interrupt will be acted upon one instruction later (i.e. the instruction after the next instruction).
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If another interrupt occurs when an interrupt handler is running, _IR_ will be overwritten, so without further precautions, nested interrupts are not supported.
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The interrupt controller will not allow further interrupts until the pending interrupt is acknowledged, so that should not not a problem.
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The interrupt handler must preserve the contents of all registers on return, and will use the same evaluation stack so it is advisable that it uses
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as few eval stack slots as possible.
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The interrupt handler schould also check the interrupt controller registers for multiple interrupt sources that may be active, and also re-enable interrupts in the interrupt controller at the end.
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To return from an interrupt, you can execute the following instruction sequence:
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```
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LOADREG IR
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JUMP
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```
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## Instruction Reference
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### BRANCH
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#### Description
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@ -1200,6 +1229,9 @@ Load content of a register onto the stack.
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|FP | Frame Pointer Register|0000|
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|BP | Base Pointer Register |0001|
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|RP | Return Stack Pointer |0010|
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|IV | Interrupt Vector Register |0011|
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|IR | Interrupt Return Register |0100|
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|ESP | Eval Stack Pointer |0101|
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#### Examples
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Get content of BP register:
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@ -1229,6 +1261,9 @@ Set register to value of the topmost stack element, which is removed afterwards.
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|FP | Frame Pointer Register|0000|
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|BP | Base Pointer Register |0001|
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|RP | Return Stack Pointer |0010|
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|IV | Interrupt Vector Register |0011|
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It is not possible to write to the _IR_ and _ESP_ registers.
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#### Examples
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Set BP register to 2000 (hexadecimal):
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