slederer/Tridora-CPU
1
0
Fork 0
Code Issues Pull requests Projects Releases Packages 3 Wiki Activity Actions

tridoracpu: update project file

Browse source 
- Vivado likes to do more ore less random changes
  and uses absolute paths without reason :(
This commit is contained in:
slederer 2025-05-25 00:31:20 +02:00
parent 7cbf3afba5
commit de889ef824
1 changed files with 7 additions and 3 deletions
Download patch file Download diff file Expand all files Collapse all files

10
tridoracpu/tridoracpu.xpr
View file

@ -4,7 +4,7 @@
<!-- Copyright 1986-2022 Xilinx, Inc. All Rights Reserved. -->
<!-- Copyright 2022-2025 Advanced Micro Devices, Inc. All Rights Reserved. -->
<Project Product="Vivado" Version="7" Minor="68" Path="C:/Users/sebastian/develop/Tridora-NexysA7/Tridora-CPU/tridoracpu/tridoracpu.xpr">
<Project Product="Vivado" Version="7" Minor="68" Path="C:/Users/sebastian/develop/Tridora/tridoracpu/tridoracpu.xpr">
<DefaultLaunch Dir="$PRUNDIR"/>
<Configuration>
<Option Name="Id" Val="ab60beb5e7ec4efc9a7b17699b9c3b13"/>
@ -361,7 +361,9 @@
</Run>
<Run Id="mig_dram_0_synth_1" Type="Ft3:Synth" SrcSet="mig_dram_0" Part="xc7a35ticsg324-1L" ConstrsSet="mig_dram_0" Description="Vivado Synthesis Defaults" AutoIncrementalCheckpoint="false" WriteIncrSynthDcp="false" Dir="$PRUNDIR/mig_dram_0_synth_1" IncludeInArchive="true" IsChild="false" AutoIncrementalDir="$PSRCDIR/utils_1/imports/mig_dram_0_synth_1" AutoRQSDir="$PSRCDIR/utils_1/imports/mig_dram_0_synth_1" ParallelReportGen="true">
<Strategy Version="1" Minor="2">
<StratHandle Name="Vivado Synthesis Defaults" Flow="Vivado Synthesis 2024"/>
<StratHandle Name="Vivado Synthesis Defaults" Flow="Vivado Synthesis 2024">
<Desc>Vivado Synthesis Defaults</Desc>
</StratHandle>
<Step Id="synth_design"/>
</Strategy>
<GeneratedRun Dir="$PRUNDIR" File="gen_run.xml"/>
@ -397,7 +399,9 @@
</Run>
<Run Id="mig_dram_0_impl_1" Type="Ft2:EntireDesign" Part="xc7a35ticsg324-1L" ConstrsSet="mig_dram_0" Description="Default settings for Implementation." AutoIncrementalCheckpoint="false" WriteIncrSynthDcp="false" SynthRun="mig_dram_0_synth_1" IncludeInArchive="false" IsChild="false" GenFullBitstream="true" AutoIncrementalDir="$PSRCDIR/utils_1/imports/mig_dram_0_impl_1" AutoRQSDir="$PSRCDIR/utils_1/imports/mig_dram_0_impl_1" ParallelReportGen="true">
<Strategy Version="1" Minor="2">
<StratHandle Name="Vivado Implementation Defaults" Flow="Vivado Implementation 2024"/>
<StratHandle Name="Vivado Implementation Defaults" Flow="Vivado Implementation 2024">
<Desc>Default settings for Implementation.</Desc>
</StratHandle>
<Step Id="init_design"/>
<Step Id="opt_design"/>
<Step Id="power_opt_design"/>