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tridoracpu: cleaned up top a bit, removed some warnings

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slederer 2025-12-15 00:53:36 +01:00
parent 0016d4ea25
commit d2f3b09e72
5 changed files with 47 additions and 58 deletions
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23
tridoracpu/tridoracpu.srcs/stackcpu.v
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@ -16,11 +16,11 @@ module stackcpu #(parameter ADDR_WIDTH = 32, WIDTH = 32,
output wire write_enable,
input wire mem_wait,
output wire led1,
output wire led2,
output wire led3
output wire debug1,
output wire debug2,
output wire debug3
);
localparam EVAL_STACK_INDEX_WIDTH = 6;
wire reset = !rst;
@ -90,7 +90,6 @@ module stackcpu #(parameter ADDR_WIDTH = 32, WIDTH = 32,
wire mem_write;
wire x_is_zero;
// wire [WIDTH-1:0] y_plus_operand = Y + operand;
wire x_equals_y = X == Y;
wire y_lessthan_x = $signed(Y) < $signed(X);
@ -105,16 +104,10 @@ module stackcpu #(parameter ADDR_WIDTH = 32, WIDTH = 32,
assign write_enable = mem_write_enable;
// debug output ------------------------------------------------------------------------------------
assign led1 = reset;
assign led2 = ins_loadc;
assign led3 = ins_branch;
// assign debug_out1 = { mem_read_enable, mem_write_enable, x_is_zero,
// ins_branch, ins_aluop, y_lessthan_x, x_equals_y, {7{1'b0}}, seq_state};
// assign debug_out2 = data_in;
// assign debug_out3 = nX;
// assign debug_out4 = nPC;
// assign debug_out5 = ins;
// assign debug_out6 = IV;
assign debug1 = reset;
assign debug2 = ins_loadc;
assign debug3 = ins_branch;
//--------------------------------------------------------------------------------------------------
// instruction decoding