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tridoracpu: reduce clock speed, fix vblank flag in vgafb

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slederer 2025-03-13 22:37:56 +01:00
parent 4f504c0f48
commit c2d7c6627a
7 changed files with 76 additions and 47 deletions
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tridoracpu/tridoracpu.srcs/cpuclk.v
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@ -17,7 +17,9 @@ module cpu_clkgen(
.CLKFBOUT_PHASE(0.0), // Phase offset in degrees of CLKFB (-360.000-360.000).
.CLKIN1_PERIOD(10.0), // Input clock period in ns to ps resolution (i.e. 33.333 is 30 MHz).
// CLKOUT0_DIVIDE - CLKOUT6_DIVIDE: Divide amount for each CLKOUT (1-128)
.CLKOUT0_DIVIDE_F(12.0), // Divide amount for CLKOUT0 (1.000-128.000).
// CPU Clock: 12.0 = 83.33MHz CPU Clock, 333.33MHz Memory Clock
// 13.0 = 76.92MHz CPU Clock, 307.69MHz Memory Clock
.CLKOUT0_DIVIDE_F(13.0), // Divide amount for CLKOUT0 (1.000-128.000).
.CLKOUT1_DIVIDE(5),
.CLKOUT2_DIVIDE(40), // 40 = 25MHz pixel clock (should be 25.175MHz per spec) for 640x480
//.CLKOUT2_DIVIDE(25), // 25 = 40MHz pixel clock for 800x600