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tridoracpu: reduce clock speed, fix vblank flag in vgafb

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slederer 2025-03-13 22:37:56 +01:00
parent 4f504c0f48
commit c2d7c6627a
7 changed files with 76 additions and 47 deletions
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tridoracpu/tridoracpu.srcs/Arty-A7-35-Master.xdc
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@ -216,3 +216,5 @@ set_property -dict {PACKAGE_PIN C2 IOSTANDARD LVCMOS33} [get_ports rst]
#set_property -dict { PACKAGE_PIN A15 IOSTANDARD LVCMOS33 } [get_ports { isns0v95_p }]; #IO_L8P_T1_AD10P_15 Sch=ad_p[10]
set_property BITSTREAM.GENERAL.COMPRESS True [current_design]
set_max_delay -from [get_pins vgafb0/display_timings_inst/o_vblank_reg/C] -to [get_pins vgafb0/vblank_xfer_reg/D] 3.000