Update documentation

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slederer 2026-02-01 23:27:25 +01:00
parent 885e50c1c0
commit 4ad879ba68
4 changed files with 70 additions and 15 deletions

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@ -10,12 +10,12 @@ For the first channel the register addresses are:
|Address|Description|
|-------|-----------|
| $A00 | Control Register |
| $A01 | Clock Divider Register |
| $A02 | Amplitude Register |
| $A04 | Clock Divider Register |
| $A08 | Amplitude Register |
The register addresses for the second channel start at $A04,
the third channel at $A08
and the fourth channel at $A0C.
The register addresses for the second channel start at $A10,
the third channel at $A20
and the fourth channel at $A30.
## Reading the control register