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vgafb: buffer maskgen outputs to avoid timing problems

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slederer 2026-01-31 17:24:36 +01:00
parent 8900eb90be
commit 1e56251fc1
3 changed files with 37 additions and 33 deletions
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57
tridoracpu/tridoracpu.srcs/vgafb.v
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@ -162,10 +162,12 @@ module vgafb #(VMEM_ADDR_WIDTH = 15, VMEM_DATA_WIDTH = 32) (
reg [4:0] acc_shift_count;
reg acc_start_shift;
reg [VMEM_DATA_WIDTH-1:0] acc_mask_in;
wire [VMEM_DATA_WIDTH-1:0] acc_mask_out;
wire [VMEM_DATA_WIDTH-1:0] acc_shifter_mask;
reg [VMEM_DATA_WIDTH-1:0] acc_mask_buf;
reg [VMEM_DATA_WIDTH-1:0] acc_shiftmask_buf;
wire [VMEM_DATA_WIDTH-1:0] acc_shifter_mask = acc_shiftmask_buf;
wire [VMEM_DATA_WIDTH-1:0] acc_shifter_out_h = acc_shifter_out[(VMEM_DATA_WIDTH*2)-1:VMEM_DATA_WIDTH];
wire [VMEM_DATA_WIDTH-1:0] acc_shifter_out_l = acc_shifter_out[VMEM_DATA_WIDTH-1:0];
`endif
assign vmem_rd_en = rd_en;
@ -176,9 +178,9 @@ module vgafb #(VMEM_ADDR_WIDTH = 15, VMEM_DATA_WIDTH = 32) (
(reg_sel == REG_CTL) ? status :
`ifdef ENABLE_FB_ACCEL
(reg_sel == REG_SHIFTER) ? acc_shifter_out_h:
(reg_sel == REG_SHIFTERM) ? acc_shifter_mask :
(reg_sel == REG_SHIFTERM) ? acc_shiftmask_buf :
(reg_sel == REG_SHIFTERSP) ? acc_shifter_out_l :
(reg_sel == REG_MASKGEN) ? acc_mask_out :
(reg_sel == REG_MASKGEN) ? acc_mask_buf :
`endif
32'hFFFFFFFF;
@ -335,27 +337,34 @@ module vgafb #(VMEM_ADDR_WIDTH = 15, VMEM_DATA_WIDTH = 32) (
acc_mask_in <= wr_data;
end
assign acc_mask_out = {
{4{|{acc_mask_in[31:28]}}},
{4{|{acc_mask_in[27:24]}}},
{4{|{acc_mask_in[23:20]}}},
{4{|{acc_mask_in[19:16]}}},
{4{|{acc_mask_in[15:12]}}},
{4{|{acc_mask_in[11:8]}}},
{4{|{acc_mask_in[7:4]}}},
{4{|{acc_mask_in[3:0]}}}
};
// mask output is buffered to avoid timing problems
always @(posedge cpu_clk)
begin
acc_mask_buf <= {
{4{~|{acc_mask_in[31:28]}}},
{4{~|{acc_mask_in[27:24]}}},
{4{~|{acc_mask_in[23:20]}}},
{4{~|{acc_mask_in[19:16]}}},
{4{~|{acc_mask_in[15:12]}}},
{4{~|{acc_mask_in[11:8]}}},
{4{~|{acc_mask_in[7:4]}}},
{4{~|{acc_mask_in[3:0]}}}
};
end
assign acc_shifter_mask = {
{4{|{acc_shifter_out_h[31:28]}}},
{4{|{acc_shifter_out_h[27:24]}}},
{4{|{acc_shifter_out_h[23:20]}}},
{4{|{acc_shifter_out_h[19:16]}}},
{4{|{acc_shifter_out_h[15:12]}}},
{4{|{acc_shifter_out_h[11:8]}}},
{4{|{acc_shifter_out_h[7:4]}}},
{4{|{acc_shifter_out_h[3:0]}}}
};
always @(posedge cpu_clk)
begin
acc_shiftmask_buf = {
{4{~|{acc_shifter_out_h[31:28]}}},
{4{~|{acc_shifter_out_h[27:24]}}},
{4{~|{acc_shifter_out_h[23:20]}}},
{4{~|{acc_shifter_out_h[19:16]}}},
{4{~|{acc_shifter_out_h[15:12]}}},
{4{~|{acc_shifter_out_h[11:8]}}},
{4{~|{acc_shifter_out_h[7:4]}}},
{4{~|{acc_shifter_out_h[3:0]}}}
};
end
`endif
//