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editor: handle DEL at prompt()

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README: small corrections
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slederer 2024-09-27 02:18:14 +02:00
parent 60db522e87
commit 18b95b6bb6
2 changed files with 16 additions and 9 deletions
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20
README.md
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@ -6,7 +6,7 @@ Everything is as simple as possible while still being reasonably useful.
Everything is open source, so you can read, understand and modify the whole system, hardware and software. Everything is open source, so you can read, understand and modify the whole system, hardware and software.
## Overview ## Overview
- Homebrew CPU - homebrew CPU
- Verilog FPGA SoC - Verilog FPGA SoC
- 32-bit word-oriented stack machine architecture - 32-bit word-oriented stack machine architecture
- running at 83 MHz on an Arty-A7 board with four clocks per instruction - running at 83 MHz on an Arty-A7 board with four clocks per instruction
@ -17,11 +17,11 @@ Everything is open source, so you can read, understand and modify the whole syst
- minimal operating system - minimal operating system
- editor, compiler, assembler run natively - editor, compiler, assembler run natively
- so you can develop programs directly on the machine - so you can develop programs directly on the machine
- small: CPU has 760 lines of verilog, compiler ~9000 LoC - small: CPU has 430 lines of Verilog, compiler ~9000 LoC
- Compiler written in Pascal and can compile itself - compiler written in Pascal and can compile itself
- Cross-compiler/-assembler can be compiled with FPC - cross-compiler/-assembler can be compiled with FPC
- Compiler does its own Pascal dialect with some restrictions and some extensions - compiler does its own Pascal dialect with some restrictions and some extensions
- Emulator available - emulator available
## Demo ## Demo
- (Video hello world) - (Video hello world)
@ -59,3 +59,11 @@ Everything is open source, so you can read, understand and modify the whole syst
- most parts of the operating system are contained in the program image - most parts of the operating system are contained in the program image
- file system is very primitive: only contiguous blocks, no subdirectories - file system is very primitive: only contiguous blocks, no subdirectories
- simple shell reminiscent of TP3.0, edit, compile, run programs - simple shell reminiscent of TP3.0, edit, compile, run programs
## Building the FPGA bitstream
- install Vivado (tested with 2024.1)
- install the package from your board in Vivado (Tools -> Vivado Store -> Boards)
- run the project creation script in Vivado (Tools -> Run TCL Script -> open "tridoracpu.tcl" in the **rtl/arty-a7 directory**)
- run synthesis, implementation and bitstream generation (Flow -> Generate Bitstream)
- program your device (Flow -> Open Hardware Manager), the bitstream file should be in **rtl/arty-a7/tridoracpu.runs/impl_1**
- the bitstream file for (temporarily) programming your device is named **top.bit**, the file for flashing your device is named **top.bin**

5
progs/editor.pas
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@ -390,8 +390,7 @@ begin
if numMode then if numMode then
isValidChar := isDigit(ch) isValidChar := isDigit(ch)
else else
isValidChar := (ord(ch) >= 32) and isValidChar := (ord(ch) >= 32)
(ord(ch) <> 127); (* don't want DEL character *)
end; end;
begin begin
@ -427,7 +426,7 @@ begin
c := chr(key); c := chr(key);
l := length(strReturn); l := length(strReturn);
if c = #8 then if (c = #8) or (c = #127) then
doBackspace doBackspace
else else
if isValidChar(c) then if isValidChar(c) then