tridoracpu: experimented with synthesis options again
- workaround for an apparent bug with LOAD address generation at offsets >= 3584 - updated bitstream URL
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2 changed files with 13 additions and 13 deletions
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@ -81,7 +81,7 @@ on the emulator image.
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- the [Hackaday project](https://hackaday.io/project/198324-tridora-cpu) (mostly copy-paste from this README)
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- the [YouTube channel](https://www.youtube.com/@tridoracpu/videos) with some demo videos
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- the [emulator](https://git.insignificance.de/slederer/-/packages/generic/tridoraemu/0.0.5/files/12) (source and windows binary)
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- the [FPGA bitstream](https://git.insignificance.de/slederer/-/packages/generic/tdr-bitstream/0.0.3/files/15) for the Arty-A7-35T board
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- the [FPGA bitstream](https://git.insignificance.de/slederer/-/packages/generic/tdr-bitstream/0.0.4/files/16) for the Arty-A7-35T board
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- an [SD-card image](https://git.insignificance.de/slederer/-/packages/generic/tdr-cardimage/0.0.4/files/13)
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Contact the author here: tridoracpu [at] insignificance.de
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